Memory Summary For HP-6005
Number of Memory Devices: 2 Total Physical Memory: 4091 MB (4096 MB)
Total Available Physical Memory: 1289 MB
Memory Load: 68%
| Item | Slot #1 | Slot #2 | Slot #3 | Slot #4 | Slot #5 |
|---|
| Ram Type |
DDR3 |
DDR3 |
Not Populated |
Not Populated |
Not Populated |
| Maximum Clock Speed (MHz) |
667 (JEDEC) |
667 (JEDEC) |
|
|
|
| Maximum Transfer Speed (MHz) |
DDR3-1333 |
DDR3-1333 |
|
|
|
| Maximum Bandwidth (MB/s) |
PC3-10600 |
PC3-10600 |
|
|
|
| Memory Capacity (MB) |
2048 |
2048 |
|
|
|
| Jedec Manufacture Name |
SK Hynix |
Samsung |
|
|
|
| Search Amazon.com |
Search! |
Search! |
|
|
|
| SPD Revision |
1.0 |
1.1 |
|
|
|
| Registered |
No |
No |
|
|
|
| ECC |
No |
No |
|
|
|
| DIMM Slot # |
1 |
2 |
|
|
|
| Manufactured |
Week 17 of Year 2012 |
Week 5 of Year 2012 |
|
|
|
| Module Part # |
HMT325U6BFR8C-H9 |
M378B5773DH0-CH9 |
|
|
|
| Module Revision |
0x4E30 |
0x0 |
|
|
|
| Module Serial # |
0x2F2A2E92 |
0x115D2422 |
|
|
|
| Module Manufacturing Location |
1 |
3 |
|
|
|
| # of Row Addressing Bits |
15 |
15 |
|
|
|
| # of Column Addressing Bits |
10 |
10 |
|
|
|
| # of Banks |
8 |
8 |
|
|
|
| # of Ranks |
1 |
1 |
|
|
|
| Device Width in Bits |
8 |
8 |
|
|
|
| Bus Width in Bits |
64 |
64 |
|
|
|
| Module Voltage |
1.5V |
1.5V |
|
|
|
| CAS Latencies Supported |
6 7 8 9 |
6 7 8 9 |
|
|
|
| Timings @ Max Frequency (JEDEC) |
9-9-9-24 |
9-9-9-24 |
|
|
|
| Maximum frequency (MHz) |
667 |
667 |
|
|
|
| Maximum Transfer Speed (MHz) |
DDR3-1333 |
DDR3-1333 |
|
|
|
| Maximum Bandwidth (MB/s) |
PC3-10600 |
PC3-10600 |
|
|
|
| Minimum Clock Cycle Time, tCK (ns) |
1.500 |
1.500 |
|
|
|
| Minimum CAS Latency Time, tAA (ns) |
13.125 |
13.125 |
|
|
|
| Minimum RAS to CAS Delay, tRCD (ns) |
13.125 |
13.125 |
|
|
|
| Minimum Row Precharge Time, tRP (ns) |
13.125 |
13.125 |
|
|
|
| Minimum Active to Precharge Time, tRAS (ns) |
36.000 |
36.000 |
|
|
|
| Minimum Row Active to Row Active Delay, tRRD (ns) |
6.000 |
6.000 |
|
|
|
| Minimum Auto-Refresh to Active/Auto-Refresh Time, tRC (ns) |
49.125 |
49.125 |
|
|
|
| Minimum Auto-Refresh to Active/Auto-Refresh Command Period, tRFC (ns) |
160.000 |
160.000 |
|
|
|
| |
|
|
|
|
|
| DDR3 Specific SPD Attributes |
|
|
|
|
|
| Write Recovery Time, tWR (ns) |
15.000 |
15.000 |
|
|
|
| Internal Write to Read Command Delay, tWTR (ns) |
7.500 |
7.500 |
|
|
|
| Internal Read to Precharge Command Delay, tRTP (ns) |
7.500 |
7.500 |
|
|
|
| Minimum Four Activate Window Delay, tFAW (ns) |
30.000 |
30.000 |
|
|
|
| Maximum Activate Window in units of tREFI |
0 |
0 |
|
|
|
| RZQ / 6 Supported |
Yes |
Yes |
|
|
|
| RZQ / 7 Supported |
Yes |
Yes |
|
|
|
| DLL-Off Mode Supported |
Yes |
Yes |
|
|
|
| Maximum Operating Temperature Range (C) |
0-95 |
0-95 |
|
|
|
| Refresh Rate at Extended Operating Temperature Range |
2X |
2X |
|
|
|
| Auto-self Refresh Supported |
Yes |
No |
|
|
|
| On-die Thermal Sensor Readout Supported |
No |
No |
|
|
|
| Partial Array Self Refresh Supported |
No |
No |
|
|
|
| Thermal Sensor Present |
No |
No |
|
|
|
| Non-standard SDRAM Type |
Standard Monolithic |
Standard Monolithic |
|
|
|
| Maxium Activate Count (MAC) |
|
|
|
|
|
| Module Type |
UDIMM |
UDIMM |
|
|
|
| Module Height (mm) |
30 |
30 |
|
|
|
| Module Thickness (front), (mm) |
2 |
2 |
|
|
|
| Module Thickness (back), (mm) |
2 |
1 |
|
|
|
| Module Width (mm) |
133.5 |
133.5 |
|
|
|
| Reference Raw Card Used |
Raw Card A Rev. 0 |
Raw Card A Rev. 1 |
|
|
|
| DRAM Manufacture |
SK Hynix |
Samsung |
|
|
|